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The packet is the atom of the digital revolution: the unit of data communication. The use of packets in networking was first proposed almost 50 years ago, leading ultimately to the Internet as we know it today. As networking has scaled down towards networks on chip, so packets feature for digital communication in the small. As applications have gone digital, so their data has become packetised. Streams of packets, and the processing of these packets, are characteristic of the digital age. It is becoming increasingly necessary to provide numerous packet processing solutions, in order to support diversity and innovation both in services and in underlying infrastructure. In turn, there is a requirement for supplying underlying high-performance architectures that support flexibility, scalability, concurrency, and diversity. These characteristics present a great opportunity for modern field programmable technologies, which offer a very natural basis for providing the necessary high-speed programmable packet processing capabilities. One major barrier for these technologies to overcome is that design, testing and maintenance is very often a low-level, hardware-oriented, experience, requiring specialist skills. A key question is whether the raw capabilities of field programmable devices can be made available to the architect and programmer in a higher-level manner, comparable to best practice in modern software engineering. To supply an initial positive answer, this paper introduces G, a high-level packet-centric language for describing packet processing specifications in an implementation-independent manner, and demonstrates that G can be compiled to give high-performance FPGA-based packet processing components. Compilation involves generating virtual processing architectures tailored to the particular requirements of a G specification. The results affirm the FPGA as a natural packet processing technology that can be programmed in a high-level manner appropriate to a packe- t-oriented mindset.