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In this paper, a new data reading technique for a bus of lines is proposed for fast operation. The proposed method utilizes multiple reference voltages available within a line's receiving logic and the initial conditions of wires in order to determine early and accurately the transmitted data of the current cycle. The presented technique does not require repeater insertion for reasonably long lines and it can significantly accelerate signal propagation. Experimental results are given in the 65 nm CMOS process for interconnects of various lengths.
Circuits and Systems I: Regular Papers, IEEE Transactions on (Volume:57 , Issue: 7 )
Date of Publication: July 2010