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ΣΔ beamforming is a promising technique for small analog front-end (AFE) of the medical ultrasound imaging system. Nonetheless, the high data rate from the ΣΔ modulator in the AFE and the high-Q reconstruction filter put harsh requirements on the digital beamforming circuits. Although the BScan-sample-based ΣΔ beamformer structure with FIR reconstruction filter reduces the speed requirement on multipliers so as to make the ΣΔ beamformer implementable in conventional digital platforms, it still requires large area for high-speed adders. In this work, a new BScan-sample-based ΣΔ beamformer structure with IIR reconstruction filter is developed. The new structure greatly reduces the hardware cost. Both ΣΔ beamformers are implemented in FPGAs and digital ICs. The new beamformer is 8 times smaller than the FIR beamformer. For a 128-element, 5MHz ultrasound medical imaging system with 256 beamformers, the new ΣΔ beamformer can be implemented with 2 FPGA chips or a 5.2mmÃ5.2mm digital IC in 0.18μm CMOS logic process.