By Topic

CAA decoder for cellular automata based byte error correcting code

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Sasidhar, K. ; Dept. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA ; Chattopadhyay, S. ; Chaudhuri, P.P.

The design of a cellular automata (CA) based byte error correcting code analogous to an extended Reed-Solomon code has been proposed by Chowdhury et al. (1982, 1985). This code has the same restrictions on error correction as that of an extended R-S code. A new design scheme has been reported for parallel implementation of the CA based SbEC/DbED and DbEC/DbED code that is analogous to the conventional R-S code. Both the encoder and decoder of this code can be efficiently implemented with an array of CA (CAA) with high throughput. The design is ideally suited for high speed memory systems built with byte organized RAM chips. Extension of the scheme to detect/correct a larger number of byte errors has also been reported. Throughput of the decoder to handle tbyte errors (t⩽4) can be found to be substantially better than that of a conventional R-S decoder. The proposed decoder provides a simple, modular and cost effective design that is ideally suited for VLSI implementation

Published in:

Computers, IEEE Transactions on  (Volume:45 ,  Issue: 9 )