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The reversible logic synthesis is a multi-objective optimization problem with rigorous constraints such as prohibiting the feedback and fan-out, and the same number of inputs and outputs, so it is difficult to be solved by general synthesis methods. Moreover, the synthesis methods of reversible logic circuits are very different from that of existing irreversible logic circuits. To make improvements in the capability and effectiveness of reversible logic synthesis, this paper proposes an algorithm of reversible logic gate-level evolutionary synthesis using multi-objective adaptive discrete differential evolution based on Pareto optimal. The synthesis experiments are conducted for a set of benchmark reversible logic circuits which are widely used in the reversible logic synthesis tests. The experiment results show that the proposed synthesis algorithm can give attention to multiple synthesis objectives at the same time, and has the capability to automatically synthesize the better reversible logic circuits, which verifies the feasibility and effectiveness of the proposed synthesis algorithm.