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Research and Implementation of the Hardware/Software Co-design Based on Structure Test Model of SoC

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3 Author(s)
Jing Gu ; Inst. of Comput. Sci. & Technol., Harbin Univ. of Sci. & Technol., Harbin, China ; Chen Zhaohui ; Yu Xiaoyang

The structure test of system-on-chip is modeled based on ITC '02 test benchmark circuits. In this paper, the idea of hardware /software co-design is used for the division and design of hardware and software in SoC testing. The principles of the hardware/software co-design and testing procedures of the structure test model of SoC is introduced in this paper. We present a systematic test specification to restrict the subsequent testing activities in SoC testing. Moreover, the division of TAM and design of IEEE std 1500 wrapper are studied. Finally we put forward an optimization strategy suitable for SoC testing.

Published in:

Computational Intelligence and Design, 2009. ISCID '09. Second International Symposium on  (Volume:1 )

Date of Conference:

12-14 Dec. 2009