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Combinational test generation using satisfiability

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3 Author(s)
Stephan, P. ; Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA ; Brayton, R.K. ; Sangiovanni-Vincentelli, A.L.

We present a robust, efficient algorithm for combinational test generation using a reduction to satisfiability (SAT). The algorithm, Test Generation Using Satisfiability (TEGUS), solves a simplified test set characteristic equation using straightforward but powerful greedy heuristics, ordering the variables using depth-first search and selecting a variable from the next unsatisfied clause at each branching point. For difficult faults, the computation of global implications is iterated, which finds more implications than previous approaches and subsumes structural heuristics such as unique sensitization. Without random tests or fault simulation, TEGUS completes on every fault in the ISCAS networks, demonstrating its robustness, and is ten times faster for those networks which have been completed by previous algorithms. Our implementation of TEGUS can be used as a base line for comparing test generation algorithms; we present comparisons with 45 recently published algorithms. TEGUS combines the advantages of the elegant organization of SAT-based algorithms with the efficiency of structural algorithms

Published in:

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:15 ,  Issue: 9 )

Date of Publication:

Sep 1996

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