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Performance Analysis of Prefetching Thread for Linked Data Structure in CMPs

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2 Author(s)
Yan Huang ; Sch. of Comput. Sci. & Technol., Zhengzhou Univ. of Light Ind., Beijing, China ; Zhimin Gu

Chip Multiprocessor (CMP) presents new opportunities to data prefetching. Prefetching thread is a well known approach to reduce memory latency and to improve performance, and has been explored in different applications. However, for applications with linked data structure(LDS), prefetching thread tends to achieve little overall performance gains. In this paper, we analyze the performance of conventional prefetching thread by an example and five selected benchmarks from Olden benchmark suite. The experimental results show that it gets best performance when computation/access latency ratio is close to 1. In addition, we propose a theorem with its proof and testify it by our experiment results.

Published in:

Computational Intelligence and Software Engineering, 2009. CiSE 2009. International Conference on

Date of Conference:

11-13 Dec. 2009