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Multilevel-spiral inductors using VLSI interconnect technology

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3 Author(s)
Burghartz, J.N. ; IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA ; Jenkins, K.A. ; Soyuer, M.

A multilevel-spiral (MLS) inductor structure for implementation in VLSI interconnect technology is presented. Inductances of 8.8 and 32 nH and maximum quality-factors (Q) of /spl sim/6.8 and 3.0, respectively, are achieved in a four-level metal BiCMOS technology, with four turns at each of the two or four stacked spiral coils and with an area of 226×226 μm2. The comparison of the MLS inductors to different single-level-spiral (SLS) control devices shows that a MLS inductor provides the same inductance at /spl sim/50% dc resistance, but the maximum Q is typically measured at a lower frequency and the self-resonance frequency is reduced due to a high inter-wire capacitance.

Published in:

Electron Device Letters, IEEE  (Volume:17 ,  Issue: 9 )