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Novel gate dielectric films formed by ion plating for low-temperature-processed polysilicon TFTs

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4 Author(s)
Ching-Fa Yeh ; Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan ; Chen, Tai-Ju ; Ching-Lin Fan ; Kao, Jiann-Shiun

A novel SiO/sub 2/ film formed by ion plating (IP) at room temperature was developed for low-temperature-processed (LTP) (<625/spl deg/C) polysilicon thin-film transistors (poly-Si TFT's). The IP SiO/sub 2/ film is a high-density dielectric with strained bonds, and also a high-performance insulator with low-leakage current and high-breakdown voltage. Poly-Si TFT with IP SiO/sub 2/ as a gate insulator shows satisfactory performance.

Published in:

Electron Device Letters, IEEE  (Volume:17 ,  Issue: 9 )