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A novel post-ATPG IR-drop reduction scheme for at-speed scan testing in broadcast-scan-based test compression environment

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8 Author(s)
Kohei Miyase ; Kyushu Institute of Technology, Iizuka, Japan ; Yuta Yamato ; Kenji Noda ; Hideaki Ito
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Reducing IR-drop in the test cycle during at-speed scan testing has become mandatory for avoiding test-induced yield loss. An efficient approach for this purpose is post-ATPG test modification based on X-identification and X-filling since it causes no circuit/clock design change and no test vector count inflation. However, applying this approach to test compression has been considered challenging due to the limited availability of X-bits. This paper solves this serious problem by proposing a novel and practical CA (Compression-Aware) test modification scheme for reducing IR-drop in the widely-used broadcast-scan based test compression environment. This unique scheme features (1) CA circuit remodeling for minimizing the effort of applying test modification to broadcast-scan-based test compression, (2) CA X-identification for increasing X-bits for risky test vectors, and (3) CA X-filling for effectively using limited X-bits in reducing IR-drop. As a result, the CA test modification scheme can achieve significant IR-drop reduction even when a test cube only has a small number of X-bits. This advantage is clearly demonstrated by experimental results on three compression configurations created from an industrial circuit.

Published in:

2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers

Date of Conference:

2-5 Nov. 2009