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Computer-aided design of fault-tolerant VLSI systems

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3 Author(s)
Karri, R. ; Massachusetts Univ., Amherst, MA, USA ; Hogstedt, K. ; Orailoglu, A.

The authors present a flexible methodology for compiling an algorithmic description into an equivalent fault-tolerant VLSI circuit and a CAD framework embodying this methodology. Experimental designs illustrate and validate algorithms for automated synthesis of ICs featuring either self-recovery capability or enhanced reliability

Published in:

Design & Test of Computers, IEEE  (Volume:13 ,  Issue: 3 )