Skip to Main Content
MD5 and SHA (secure hash algorithm)-1 are international standards and widely used hash algorithms. Since these algorithms are getting vulnerable to attacks, NIST (National Institute of Standard and Technology) collected publicly SHA-3 although weaknesses of SHA-2 have not been found. ARIRANG is a new hash algorithm and one of candidates for the SHA-3 competition. Compared with SHA-2, ARIRANG has more security intensity whereas its embodiment uses more resources. In this paper, we embodied hardware ARIRANG modules. Then, we compared the resource increments of the hardware ARIRANG module against the hardware SHA-2 module with the resource increments of the software module of them. We embodied the hardware module using the Verilog HDL and VHDL, and compared together. Also, our implementation contains a simplified SubBytes operation block using composite fields (GF((24)2) and GF(((22)2)2)) with an 8-bit look-up table in GF(28).