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Hardware encryption engines are essential components of secure systems. They are widely used in desktop applications such as the trusted platform module as well as in mobile applications where they offer high energy efficiency compared to their software implementation counterparts. Unfortunately, ASIC encryption engines leak side-channel information through their power supplies. This information can be used by attackers to reveal their secret keys with attacks such as differential power analysis. Dual-rail logic and noise addition circuits increase the security against these attacks, but they add higher than 3x overheads in area, power, and performance to unsecured encryption engines. In this work, we present a switched capacitor circuit that equalizes the current to isolate the critical encryption activity from the external supplies, eliminating the side-channel information leakage. The secure encryption system was implemented in a 0.13 Â¿m CMOS technology with 7.2% area and 33% power overheads and a 2 Ã performance degradation. The secret encryption key was not revealed after ten million side-channel attacks.