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A 10-bit 500-KS/s low power SAR ADC with splitting comparator for bio-medical applications

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5 Author(s)
Wen-Yi Pang ; Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan ; Chao-Shiun Wang ; You-Kuang Chang ; Nai-Kuan Chou
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This paper presents a successive approximation register analog-to-digital converter (SAR ADC) design for bio-medical applications. Splitting comparator and energy saving capacitor array are proposed to achieve low power consumption. The average switching energy of the capacitor array can be reduced by 69% compared to a conventional switching method. The measured signal-to-noise-and-distortion ratios of the ADC is 58.4 dB at 500 KS/s sampling rate with an ultra-low power consumption of 42-¿W from a 1-V supply voltage. The ADC is fabricated in a 0.18-¿m CMOS technology.

Published in:

Solid-State Circuits Conference, 2009. A-SSCC 2009. IEEE Asian

Date of Conference:

16-18 Nov. 2009

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