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A quick address detection of an anomalous memory cell for flash EEPROM

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6 Author(s)
Himeno, T. ; Semicond. Device Eng. Lab., Toshiba Corp., Tokyo, Japan ; Hazama, H. ; Sakui, K. ; Kanda, K.
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A simple technique for quickly detecting an address of an anomalous memory cell for flash EEPROM devices is described. A proposed Multi-Address Selection Scheme (MASS) can drastically reduce measurement cycles for searching an address of an anomalous memory cell which has an abnormally high or low threshold voltage. A systematic evaluation for the reliability of flash EEPROM has been realized by this quick address detection technology

Published in:
Microelectronic Test Structures, 1996. ICMTS 1996. Proceedings. 1996 IEEE International Conference on

Date of Conference: 25-28 Mar 1996

Page(s):
195 - 199
Meeting Date :
25 Mar 1996-28 Mar 1996
Print ISBN:
0-7803-2783-7
INSPEC Accession Number:
5417902
Conference Location :
Trento
Digital Object Identifier :
10.1109/ICMTS.1996.535645
Product Type:
Conference Publications

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