Cart (Loading....) | Create Account
Close category search window
 

Verification and Codesign of the Package and Die Power Delivery System Using Wavelets

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)

As part of the design of large integrated circuits, one must verify that the power delivery network provides supply and ground voltages to the circuit that are within specified ranges. We introduce the concept of time-frequency description of circuit currents using wavelets, and use that to set up an optimization framework that finds the worst-case supply/ground voltage fluctuations. This framework allows for the quick determination of the impact of either the package or the die on the worst-case behavior, which enables their codesign. This approach has been applied to an industrial microprocessor design, resulting in realistic and nonobvious worst-case waveforms.

Published in:

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:29 ,  Issue: 1 )

Date of Publication:

Jan. 2010

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.