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An ultra-high-speed comparator design based on the regeneration architecture, which could be used in flash ADC, was presented in this paper. The speed of regeneration circuit was studied deeply. And the size of switch-MOSFET was optimized and makes the comparator could work at the speed as high as possible. The corresponding circuit layout was implemented in IBM 90-nm CMOS technology. The post simulation result shows the comparator could work well at 6 GHz while the power dissipation is 240 Â¿W.