Referenced Items are not available for this document.
This paper presents the design of a multiple-valued current-mode (MVCM) logic circuit with a low supply voltage for high-speed arithmetic systems at low power dissipation. A multiple-valued differential logic circuit (DLC) is used as a basic component to make a signal-voltage swing small yet driving capability large. The use of DLC enables high-speed operations with reduced device and interconnection counts at low power dissipation.
Published in:
Solid-State Circuits Conference, 1995. Digest of Technical Papers. 41st ISSCC, 1995 IEEE International
Date of Conference: 15-17 Feb. 1995
- Page(s):
- 314 - 315
- Meeting Date :
- 15 Feb 1995-17 Feb 1995
- ISSN :
- 0193-6530
- Print ISBN:
- 0-7803-2495-1
- INSPEC Accession Number:
- 5131872
- Conference Location :
- San Francisco, CA, USA
- Digital Object Identifier :
- 10.1109/ISSCC.1995.535570
- Product Type:
- Conference Publications
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