By Topic

A 2.7 V to 4.5 V single-chip GSM transceiver RF integrated circuit

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Stetzler, T. ; AT&T Microelectron., Reading, PA, USA ; Post, I. ; Havens, J. ; Koyama, M.

This paper describes a 2.7 to 4.5 V single chip GSM transceiver IC. The addition of a power amplifier, LNA and filters are all that is required to implement a GSM terminal's radio section. This chip includes two fixed-frequency synthesizers (for transmit and receive IF frequencies), a programmable frequency agile UHF synthesizer (for channel selection in both receive and transmit modes), RF mixer, single IF down conversion with quadrature demodulation and variable gain for the receive path, and a direct-up modulator with offset oscillator to avoid spurious signals and oscillator pulling. The circuit also contains control circuitry for separate receive, transmit, and UHF synthesizer modes to minimise power consumption. The IC is implemented in a l2 GHz bipolar technology with a 1.5 /spl mu/m minimum feature.

Published in:

Solid-State Circuits Conference, 1995. Digest of Technical Papers. 41st ISSCC, 1995 IEEE International

Date of Conference:

15-17 Feb. 1995