A 2.7 V to 4.5 V single-chip GSM transceiver RF integrated circuit

This paper describes a 2.7 to 4.5 V single chip GSM transceiver IC. The addition of a power amplifier, LNA and filters are all that is required to implement a GSM terminal's radio section. This chip includes two fixed-frequency synthesizers (for transmit and receive IF frequencies), a programmable frequency agile UHF synthesizer (for channel selection in both receive and transmit modes), RF mixer, single IF down conversion with quadrature demodulation and variable gain for the receive path, and a direct-up modulator with offset oscillator to avoid spurious signals and oscillator pulling. The circuit also contains control circuitry for separate receive, transmit, and UHF synthesizer modes to minimise power consumption. The IC is implemented in a l2 GHz bipolar technology with a 1.5 /spl mu/m minimum feature.