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This brief presents a CMOS temperature sensor suitable for ultralow-power applications. With a MOS transistor operating in the linear region, a linear relationship between delay and temperature can be obtained. A differential sensing architecture is utilized to reduce the signal offset and increase the effective signal-to-noise ratio. A design methodology concerning power optimization and improved sensor linearity is also presented. The sensor, which occupies 0.0324 mm2, is fabricated using the TSMC 0.18-Â¿m one-polysilicon six-metal (1P6M) process. Measurement results show that the sensor consumes 405 nW with a 1-V supply at 1 ksample/s at room temperature. An inaccuracy value of -0.8Â°C to +1Â°C from 0Â°C to 100Â°C after calibration is achieved.
Circuits and Systems II: Express Briefs, IEEE Transactions on (Volume:56 , Issue: 12 )
Date of Publication: Dec. 2009