Cart (Loading....) | Create Account
Close category search window
 

In-circuit hot-carrier model and its application to inverter chain optimization

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Horiuchi, T. ; ULSI Device Dev. Labs., NEC Corp., Kangawa, Japan

An analytical in-circuit device lifetime model and design methodology for minimizing hot-carrier effects in an inverter chain are presented. Based on the model, in-circuit device lifetime, τAC , for hot-carrier induced degradation is given by τAC DC/R, R≡√π/2√Vcc/b√(T rise.Tfall)/Tc where τDC is the device lifetime under a DC test, Trise and Tfall are the rise time for input and fall time for output, TC is cycle time and b is a constant. The model also shows that minimizing circuit delay in the inverter chain maximizes hot-carrier reliability

Published in:

Electron Devices, IEEE Transactions on  (Volume:43 ,  Issue: 9 )

Date of Publication:

Sep 1996

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.