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Design of on-chip image processing based on APB bus with CMOS image sensor

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3 Author(s)
Ge Zhiwei ; ASIC Design Center, Tianjin Univ., Tianjin, China ; Yao Suying ; Xu Jiangtao

This paper presents a novel on-chip image processing architecture with CMOS image sensor, which applies APB bus to implement image processing. The proposed architecture presents the issues related to color image processing and gives the differences between the proposed architecture and the traditional image processing pipeline used in digital still cameras. Considering the hardware implementation and power requirement, this paper combines two efficient auto white balance method together to adjust the three independent color channels. By applied on FPGA, the proposed method can greatly enhance the image quality of raw data. The results show that the proposed image processing architecture and the auto white balance algorithms work well on FPGA development board.

Published in:

ASIC, 2009. ASICON '09. IEEE 8th International Conference on

Date of Conference:

20-23 Oct. 2009