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A low-noise CMOS readout circuit at low frequency for MEMS capacitive accelerometers

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3 Author(s)
Jianghua Chen ; Sch. of Inf. Sci. & Eng., Shandong Univ., Jinan, China ; Xuewen Ni ; Bangxian Mo

This paper describes a low-noise CMOS readout circuit for MEMS capacitive accelerometers at low frequency. It cancels the input parasitic capacitance and the offset by a combination of switches. The raised current IDS of the input differential pair in the first stage helps reduce sharply the total low-frequency noises without increasing the complexity of the proposed circuit. The switched-capacitor low-pass filter with adjustable bandwidth can eliminate noises and interferences outside its bandwidth, and save chip area at low frequency. The simulation result of the proposed circuit shows that an average 60% noise reduction at low frequency has been achieved when the current in the current source of the first stage is six times larger than the original. The root mean square equivalent input noise voltage is about 6.1nV/rtHz@1kHz. The experimental result shows that the capacitance resolution of the whole CMOS readout circuit is 11aF/rtHz@1kHz.

Published in:

ASIC, 2009. ASICON '09. IEEE 8th International Conference on

Date of Conference:

20-23 Oct. 2009