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A 900 MHz low-noise high-linearity polar transmitter front-end for EDGE system is presented, including a multiplier as well as a driver amplifier. The whole circuit is implemented in IBM 0.18 Â¿m CMOS process. The multiplier and DA provide output power ranging from -30 dBm to 4.5 dBm, an ACPR of -63 dBc at 400 KHz offset and an output noise of -167 dBm/Hz at 20 MHz offset. The spurious around 2nd and 3rd harmonics are -46 dBc and -39 dBc respectively. The carrier suppression is -45dBc. The whole circuit consumes 23~56 mA from a 1.8 V supply voltage according to different gain levels.