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Thermo-structural model of stacked field-programmable gate arrays with through-silicon vias

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3 Author(s)
Zhang, C. ; Micron Res. Center, Utah State Univ., Logan, UT, USA ; Dasu, A. ; Li, L.

A new 3-D full-scale thermo-structural finite element model of two-stack field-programmable gate arrays (FPGAs) with through-silicon vias (TSVs), which is developed from an experimentally validated single-stack FPGA model, is proposed. Typical 3-D distributions and evolutions of temperature and von Mises stress on both the active layers and TSVs are presented.

Published in:

Electronics Letters  (Volume:45 ,  Issue: 24 )