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Designing manycore processor networks using silicon photonics

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7 Author(s)
Ajay Joshi ; Department of EECS, Massachusetts Institute of Technology, Cambridge, USA ; Christopher Batten ; Yong-Jin Kwon ; Scott Beamer
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We present a vertical integration approach for designing silicon photonic networks for communication in manycore systems. Using a top-down approach we project the photonic device requirements for a 64-tile system designed in 22 nm technology.

Published in:

LEOS Annual Meeting Conference Proceedings, 2009. LEOS '09. IEEE

Date of Conference:

4-8 Oct. 2009