This brief paper deals with using the particle swarm optimization metaheuristic for optimally sizing switched current (SI) memory cells, namely the class AB grounded gate SI memory cell. Pareto front is generated while optimizing two main conflicting performances: maximizing both the signal to noise ratio and the sampling frequency. SPICE simulation results are presented to validate obtained sizing.
Published in:
Computational Intelligence and Intelligent Informatics, 2009. ISCIII '09. 4th International Symposium on
Date of Conference: 21-25 Oct. 2009