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Energy-efficient performance budgeting in FEC-based high-speed I/O links

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2 Author(s)
Rajan Lakshmi Narasimha ; Coordinated Science Laboratory/ECE Department, University of Illinois at Urbana-Champaign ; Naresh Shanbhag

In this paper, we look at how the introduction of forward error correction (FEC) impacts system design in a high-speed I/O link. We present examples where coding gain maps to improvements in transmit swing, ADC precision, jitter tolerance and comparator offset tolerance.

Published in:

2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems

Date of Conference:

19-21 Oct. 2009