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Accurate Predictive Interconnect Modeling for System-Level Design

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6 Author(s)
Carloni, L.P. ; Dept. of Comput. Sci., Columbia Univ. at New York, Columbia, NY, USA ; Kahng, A.B. ; Muddu, S.V. ; Pinto, A.
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We propose new accurate predictive models for the delay, power, and area of buffered interconnects to enable a more effective system-level design exploration with existing and future nanometer technology processes. We show that our models are significantly more accurate than previous models - essentially matching sign-off analyses. We integrate our models in the COSI-OCC communication synthesis infrastructure and show how they impact the feasibility and optimality of the network-on-chip architectures that are synthesized by this tool.

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Very Large Scale Integration (VLSI) Systems, IEEE Transactions on  (Volume:18 ,  Issue: 4 )