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Four novel low-power full adder cores with all full voltage-swing nodes are proposed to implement the ten adder modules for high-performance and low-power embedded structure. The main design objectives for these adder modules are providing not only low power dissipation and high operation speed but also full-voltage swing and the driving capability. The simulation results show that our proposed adder module M10 is superior to previous designs in transistor count with only 17 transistors per bit and consumes 51.99% to 62.99% less power than three previous designs, while it is 63.88% to 105.55% faster. Experimental results confirm the proposed adder cores are valid and effective.
Date of Conference: 12-14 Sept. 2009