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The secret key stored in a cryptographic device can be revealed from the power consumption using statistical analysis in a technique known as differential power analysis (DPA). However, DPA attacks are sensitive to measurement misalignments in the power samples that reduce the dependency between the power and the data. A countermeasure technique that increases this misalignment by inserting random delays between operations, known as random delay insertion, was shown in previous research to be effective against DPA on hardware implementations. A differential frequency-based attack (DFBA) is a DPA technique that involves a frequency-based preprocessing step and it can be utilized to attack security implementations that include misalignments. In this research, a DFBA attack is carried out on an AES algorithm implemented on both ASIC and FPGA devices. The results indicate that the length of delay which the DFBA attack can reduce is limited. Therefore, the RDI countermeasure is effective against DFBA when the inserted delay is larger than the effective DFBA window size.