Scheduled System Maintenance:
Some services will be unavailable Sunday, March 29th through Monday, March 30th. We apologize for the inconvenience.
By Topic

System Level Speedup Oriented Cache Partitioning for Multi-programmed Systems

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

The purchase and pricing options are temporarily unavailable. Please try again later.
2 Author(s)
Guang Suo ; Nat. Lab. for Paralleling & Distrib. Process., Nat. Univ. of Defense Technol., Changsha, China ; Xue-jun Yang

In a chip-multiprocessor with a shared cache structure, the last level cache is shared by multiple applications executing simultaneously. The competing accesses from different applications degrade the system performance, resulting in non-predicting executing time. Cache partitioning techniques partition the shared cache for multiple applications. Traditional cache partitioning mechanisms, such as Utility-based Cache Partitioning (UCP) and IPC-based Cache Partitioning (IPC-CP), aim to optimize the objective (for example, instruction per cycle or miss rate) that is appealing for individual application. However, the performances of multi-programmed systems are usually characterized by the number of applications finished during certain interval. This paper investigates System Level Speedup oriented Cache Partitioning (SLS-CP), which is used to maximize total speedup of the system. Like UCP and IPC-CP, the inputs of SLS-CP are current performance status and misses of all the possible partitions, and the outputs of SLS-CP are optimum cache partitions for multi-programmed workloads. Our evaluation, on top of a two cores CMP processor with 8 multi-programmed workloads shows that SLS-CP improves system level speedup and fairness over UCP and IPC-CP.

Published in:

Network and Parallel Computing, 2009. NPC '09. Sixth IFIP International Conference on

Date of Conference:

19-21 Oct. 2009