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Self-assembled nanodielectrics and silicon nanomembranes for low voltage, flexible transistors, and logic gates on plastic substrates

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7 Author(s)
Hoon-Sik Kim ; Department of Materials Science and Engineering, University of Illinois, 1304 West Green Street, Urbana, Illinois 61801, USA ; Sang Min Won ; Ha, Young-geun ; Jong-Hyun Ahn
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This letter reports the fabrication and electrical characterization of mechanically flexible and low operating voltage transistors and logic gates (NOT, NAND, and NOR gates) using printed silicon nanomembranes and self-assembled nanodielectrics on thin plastic substrates. The transistors exhibit effective linear mobilities of ∼680 cm2/Vs, on/off ratios ≫107, gate leakage current densities ≪2.8×10-7 A/cm2, and subthreshold slopes ∼120 mV/decade. The inverters show voltage gains as high as 4.8. Simple digital logic gates (NAND and NOR gates) demonstrate the possible application of this materials combination in digital integrated circuits.

Published in:

Applied Physics Letters  (Volume:95 ,  Issue: 18 )

Date of Publication:

Nov 2009

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