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A Micropower \Delta \Sigma -Based Interface ASIC for a Capacitive 3-Axis Micro-Accelerometer

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7 Author(s)
Paavola, M. ; SMARAD-2/Electron. Circuit Design Lab., Helsinki Univ. of Technol., Espoo, Finland ; Kamarainen, M. ; Laulainen, E. ; Saukoski, M.
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In this paper, a micropower interface IC for a capacitive 3-axis micro-accelerometer is presented. The IC is implemented in a 0.25-mum CMOS process. The fully-integrated sensor interface is based on a DeltaSigma sensor front-end that operates mechanically in an open-loop configuration and converts the acceleration signals directly into the digital domain, thus avoiding the use of separate analog-to-digital converters. A detailed analysis with transfer functions is presented for the front-end circuit. Furthermore, the interface IC includes a decimator, a frequency reference, a clock generator for the front-end, a voltage and current reference, the required reference buffers, and low-dropout regulators (LDOs) needed for system-on-chip power management. The interface IC provides operating modes with 12-bit resolution for 1 and 25 Hz signal bandwidths. The former is optimized for very low power dissipation at the cost of reduced bandwidth, and is intended for example for activity monitoring in otherwise powered-off devices. The chip, with a 1.73 mm2 active area, draws typically 21.2 muA in the 1 Hz mode, and 97.6 muA in the 25 Hz mode, from a 1.2-2.75 V supply. In the 1 and 25 Hz modes with a plusmn 4-g capacitive 3-axis accelerometer, the measured noise floors in the x-, y-, and z-directions are 1080, 1100 and 930 mug/radic{Hz}, and 360, 320 and 275 mug/radic{Hz} , respectively. The implemented prototype achieves competitive figures of merit (FOMs) compared to the other published or commercially available, low-g, low-power accelerometers.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:44 ,  Issue: 11 )