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This paper introduces a novel direct digital frequency synthesizer (DDFS) with an architecture based on the quasi-linear interpolation method (QLIP). The QLIP method is a hybrid polynomial interpolation in which the first quarter of a cosine function is approximated by two sets of linear and parabolic polynomials. The section of the cosine function that is closer to its peak is interpolated by parabolic polynomials, due to its resemblance to a parabola. The rest of the function, which is closer to where it approaches zero, is interpolated by linear polynomials. The paper describes the proposed interpolation method and its VLSI implementation. The performance of the proposed implementations is compared to several state-of-the-art DDFS designs.