By Topic

Adaptive error control for nanometer scale network-on-chip links

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Yu, Q. ; Dept. of Electr. & Comput. Eng., Univ. of Rochester, Rochester, NY, USA ; Ampadu, P.

The authors present an adaptive error control method for switch-to-switch links in nanoscale networks-on-chip to manage reliability, throughput and energy. Unlike previous works, the proposed method adjusts both error detection and correction simultaneously at runtime. For a given application or predicted noise scenario, an appropriate error control scheme is selected for reliable message transmission. When link conditions degrade, more powerful error detection and correction are temporarily provided to recover the previous message. To achieve this adaptation, the authors create a configurable M-error correction, 2M-error detection code, combined with a hybrid automatic repeat request retransmission policy. Simulation results show that the proposed method can reduce residual flit error rate by over three orders of magnitude and achieve up to 75% higher average throughput compared to other error control methods. Further, average energy per successfully transmitted flit is reduced by up to 15% compared to fixed error control in a 65-nm technology. Compared to a recent adaptive error detection method, a 34% energy reduction can be achieved in high noise environment, at the expense of moderate area overhead.

Published in:

Computers & Digital Techniques, IET  (Volume:3 ,  Issue: 6 )