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In-system testing of cache memories

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1 Author(s)
Sosnowski, J. ; Inst. of Comput. Sci., Warsaw Univ. of Technol., Poland

Caches embedded in microprocessor systems are implemented with limited observability and controllability. Hence they create many problems in testing. This paper gives a methodology of developing user test programs for data and instruction caches with various organization

Published in:

Test Conference, 1995. Proceedings., International

Date of Conference:

21-25 Oct 1995