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Using a SAT solver to generate checking sequences

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4 Author(s)
Jourdan, G.-V. ; Fac. of Eng., Univ. of Ottawa Ottawa, Ottawa, ON, Canada ; Ural, H. ; Yenigun, H. ; Dong Zhu

Methods for software testing based on finite state machines (FSMs) have been researched since the early 60's. Many of these methods are about generating a checking sequence from a given FSM which is an input sequence that determines whether an implementation of the FSM is faulty or correct. In this paper, we consider one of these methods, which constructs a checking sequence by reducing the problem of generating a checking sequence to finding a Chinese rural postman tour on a graph induced by the FSM; we re-formulate the constraints used in this method as a set of Boolean formulas; and use a SAT solver to generate a checking sequence of minimal length.

Published in:

Computer and Information Sciences, 2009. ISCIS 2009. 24th International Symposium on

Date of Conference:

14-16 Sept. 2009