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Generating Toffoli networks from ESOP expressions

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2 Author(s)
Sanaee, Y. ; Fac. of Comput. Sci., Univ. of New Brunswick, Fredericton, NB, Canada ; Dueck, G.W.

In this paper a new heuristic ESOP-based synthesis method for Toffoli networks is proposed. This synthesis method takes advantage of the shared-ESOP cubes among the outputs to generate a cascade of Toffoli gates. The method is suitable to generate circuits for functions with large number of input variables. A greedy approach is utilized to select pairs among the different outputs with common ESOP-cubes. The shared terms need only to be realized once and the result can then be transferred to the second output, and thus reducing the number of Toffoli gates. The synthesis algorithm has been applied to a set of benchmark functions. Experimental results show that the algorithm can generate circuits with reduced quantum cost for virtually all functions. Template applications can further improve the results.

Published in:

Communications, Computers and Signal Processing, 2009. PacRim 2009. IEEE Pacific Rim Conference on

Date of Conference:

23-26 Aug. 2009