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A low complexity VLSI architecture for MIMO sphere decoding algorithm

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2 Author(s)
Shariat-Yazdi, R. ; Dept. of Electron., Carleton Univ., Ottawa, ON, Canada ; Kwasniewski, T.

This paper presents a low complexity VLSI architecture for depth-first sphere decoding algorithm. A modified depth first sphere decoding algorithm that requires less hardware resources and provides higher throughput has been introduced. In order to implement the proposed algorithm, we introduce a new enumeration methodology that can be used for M-QAM based modulation schemes. The effectiveness of the proposed architecture has been demonstrated for a 4times4 64-QAM MIMO system.

Published in:

Circuits and Systems and TAISA Conference, 2009. NEWCAS-TAISA '09. Joint IEEE North-East Workshop on

Date of Conference:

June 28 2009-July 1 2009

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