Skip to Main Content
We present in this paper a new full-wave CMOS rectifier topology. It uses bootstrapped capacitors to reduce the effective threshold voltage of selected MOS switches. It achieves a significant increase in overall power efficiency and low voltage-drop. The structure does not require complex circuit design. The highest voltages available in the circuit are used to drive the gates of selected transistors in order to reduce the leakages and to lower their channel on-resistance, while having high transconductance. The proposed rectifier was implemented using the standard TSMC 0.18 mum CMOS process and then characterized with the SpectreS simulator. When connected to a source of 3.3 V nominal peak amplitude, it allows improving the power efficiency by 11%. For low source voltages (0.8 V peak), the average output voltage improvement is up to 210% over previously published results. The circuit was laid out and reported post-layout simulation results were found to be in good agreement with schematics-based simulations.