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MFAST: a single chip highly parallel image processing architecture

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4 Author(s)
Pechanek, G.G. ; Microelectron. Div., IBM Corp., Research Triangle Park, NC, USA ; Stojancic, M. ; Vassiliadis, S. ; Glossner, C.J.

IBM MwaveTM has developed a radically new approach for real-time video and graphics processing. A scalable array of processing elements (PEs) is configured as a “folded array” for effective execution of matrix and transpose operations. The single chip Mwave Folded Array Signal Transform processor (MFAST) is a scalable DSP that provides 10+ billion 16-bit operations-per-second@50 MHz, sustainable during algorithm execution. This paper describes key M.F.A.S.T. elements and a bounded 18-22 cycle 8×8-pixel 2-D discrete cosine transform (DCT) program, verified on VHDL and functional simulator models

Published in:

Image Processing, 1995. Proceedings., International Conference on  (Volume:1 )

Date of Conference:

23-26 Oct 1995