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Introducing Tobus: the system bus in the TRON architecture

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3 Author(s)
K. Sakamura ; Dept. of Inf. Sci., Tokyo Univ., Japan ; R. Sano ; K. Honma

The Japanese TRON (The Real-Time Operating Nucleus) project has as its goal the design of a computer architecture that includes a CPU, operating systems and a man-machine interface. Peripherals are portable because TRON designers set a board-level standard for the system bus protocol. The end product transfers data at rates from 50 M to 100 M bytes/s. A description is given of Tobus, the system bus designed to fit the standard. Bus arbitration, data transfer and interrupt-handling are discussed.<>

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IEEE Micro  (Volume:8 ,  Issue: 2 )