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The paper highlights the need to apply the test-per-clock method at full clock rates to test crosstalks in networks of long interconnections between modules in a System on a Chip (SoC). The proposed method of testing n-interconnects involves the 3n-R-LFSR (ring linear feedback shift register) with a polynomial that guarantees the long counting cycle. The part of the ring LFSR that generates test patterns has double number of flip-flops where every second flip-flop is connected to the network of interconnections under test. It has been proved that the 3n-R-LFSR register is capable to generate all the two-test patterns that are necessary for the network with n interconnections. The completed simulation experiments evidenced efficiency of the method application to test crosstalks that are manifested by either an glitch or an edge delay.