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This paper presents a novel recursive algorithm to compute the modified discrete cosine transform (MDCT) and the inverse MDCT (IMDCT) based on type IV of the discrete cosine transform (DCT-IV) algorithm. The proposed algorithm has the following advantages: In contrast with parallel designs, the input sequence fed by serial in/serial out (SISO) can dynamically be switched with the variable window length. The data throughput per transformation for the MDCT and IMDCT algorithms is four times higher than that of the previous algorithms, and the ROM size can be reduced by 50%-79%. Less memory is required for accessing; thus, it can reduce the chip area in hardware implementation. The chip efficiency is also increased, and the proposed architecture makes a feasible design to integrate several audio standards [i.e., advanced audio coding (AAC)/AAC in digital radio mondiale (DRM/MPEG-1 Audio Layer 3 (MP3)] into one portable media player. The proposed algorithm is designed and fabricated by using 0.18-mum 1P6M complimentary metal-oxide-semiconductor (CMOS) process. The core area is 441 times 437 mum2, including the MDCT, IMDCT, and DCT-IV modules. For modern audio applications, i.e., AAC/AAC in DRM/MP3, this processor only consumes 14.077/3.482/0.3138 mW at 50/12.5/1 MHz. Furthermore, the proposed algorithm can calculate the 2048/1920/256/240/36/12-point MDCT and the 1024/960/128/120/18/6-point IMDCT.