Referenced Items are not available for this document.
From a system architecture perspective, 3D technology can satisfy the high memory bandwidth demands that future multicore/manycore architectures require. This article presents a 3D DRAM architecture design and the potential for using 3D DRAM stacking for both L2 cache and main memory in 3D multicore architecture.
Published in:
Design & Test of Computers, IEEE
(Volume:26
,
Issue:
5
)
Date of Publication: Sept.-Oct. 2009
- Page(s):
- 36 - 47
- ISSN :
- 0740-7475
- INSPEC Accession Number:
- 10918033
- Digital Object Identifier :
- 10.1109/MDT.2009.105
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 13 October 2009
- Issue Date :
- Sept.-Oct. 2009
- Sponsored by :
- IEEE Council on Electronic Design and Automation
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