By Topic

The Common Cross-Connected Stage for the 5L ANPC Medium Voltage Multilevel Inverter

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Chaudhuri, T. ; ABB Secheron, Geneva, Switzerland ; Rufer, A. ; Steimer, P.K.

Rising interest in multilevel applications has triggered new research activities. This paper proposes a novel multilevel power electronics building block (PEBB) for the five-level active neutral point clamped (ANPC) multilevel voltage source inverter. The PEBB is composed of six switches in a crossed configuration and one capacitor. It is common to the three phases of a five-level ANPC topology, enabling a large number of levels to be generated. This PEBB is meant to be a reliable upgrade to the 5L topology, increasing output signal quality and reducing the size of the output filter in medium voltage applications. The number of levels generated by the common cross-connected stage (C3S) PEBB and the ANPC depends on the voltage ratios chosen between the phase capacitors of the ANPC and the PEBB capacitor(s). The tradeoff stands between the ability to balance the capacitors, the rated blocking voltage of the devices, and the number of levels produced. Under a given configuration, nine levels can be produced, with the possibility to balance the capacitors up to modulation indexes in the region of m = 0.92. The analysis of the general topology, the description of the nine-level case, and simulation results are first presented. Prototyping results are then shown, and they validate the introduced concept and topology.

Published in:

Industrial Electronics, IEEE Transactions on  (Volume:57 ,  Issue: 7 )