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A CMOS single-chip transceiver IC is developed for IEEE 802.22 cognitive radio applications. Over the 54 to 862 MHz ultra wideband, the in-band harmonic distortions of the transmitter and the unwanted harmonic mixing of the receiver are effectively suppressed by exploiting the dual-path direct-conversion architecture. A seamless coverage of the full band is achieved by employing a fractional-N PLL with a single LC VCO and a multi-modulus LO generator. Implemented in 0.18 mum CMOS, the receiver achieves 110 dB gain dynamic range, < 8.5 dB noise figure, and > -11 dBm IIP3 at the LNA bypass mode. The transmitter delivers -3 dBm output power with OP1dB and OIP3 greater than +6.4 dBm and +15.9 dBm, respectively. On-chip calibration circuits suppress the image and carrier leakage components below -41 dBc across the total band.