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This paper describes the energy-efficient implementation of a high performance parallel Radix-4 turbo decoder, which is designed to support multiple fourth-generation (4G) wireless communication standards such as mobile WiMAX and 3GPP-LTE. We propose a new hardware architecture that can share hardware resources for the two standards. It mainly consists of eight retimed Radix-4 soft-input soft-output (SISO) decoders to achieve high throughput and a dual-mode parallel hardware interleaver to support both almost regular permutation (ARP) and quadratic polynomial permutation (QPP) interleavers defined in the two standards. A prototype chip supporting both mobile WiMAX and 3GPP-LTE standards is fabricated in a 0.13 mum CMOS technology with eight metal layers. The decoder core occupies 10.7 mm2 and can exhibit a decoding rate of more than 100 Mb/s with eight iterations while achieving an energy efficiency of 0.31 nJ/bit/iter.